CvSDL was introduced in 2003 as a C++ class framework with Verilog features that worked like a Verilog simulator. Since then it has been revamped to be a standard-compliant HDL simulator, currently supporting Verilog. It is capable of cosimulating with SystemC. It can be used just as an HDL simulator or to generate executable specifications written in Verilog and SystemC on the hardware side and in C, C++ and SystemC on the software side. All CvSDL libraries and tools are currently available as free downloads.
See standard compliance for Verilog features supported, data sheet for implementation specific features and bug list for the current state of the tools. See hdl2cvsdl on how HDL models are translated to equivalent CvSDL models.
Aug 26, 2005:
New libraries are released that help you build GUI-based application programs.
Aug 14, 2005:
CvSDL libraries and tools have been updated for SystemC support.
Aug 3, 2005:
A DLX RISC CPU demo is available for download. The demo includes several hardware modules written in RTL and behavioral Verilog that are translated by hdl2cvsdl and embedded into a GUI-based C++ application.
May 23, 2005:
The first beta version of the HDL to CvSDL translator (hdl2cvsdl) has been released.
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CvSDL is a trademark of Tenko Technologies Inc.
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